Saturday, 29 August 2015

My Method for high speed PCB design

High Speed Design - Project

Step by step implementation of high speed design constraint

  • Some design rule creation in schematic capture itself.
  • Net list transfer to PADS layout.
  • Identify High speed design Nets.
  • Creation of
    • Net classes
    • Matched Net Length objects
    • Differential Pairs
    • Conditional Rules
    • Pin - Pairs (if required)
  • Using design guides as a reference create a Line Sim document for critical NETS and run pre-layout Signal Integrity simulation with appropriate models for drivers and receivers.
  • Based on simulation result determine optimum termination & maximum NET length as well as no. of vias to be used. (For critical Nets like Clocks I use a maximum of 4 vias).
  • Component placement keeping simulation results in mind.
  • After complete component placement run pre-layout SI analysis using "Manhattan Length".
  • Start the routing process in PADS Router.
  • Fan-out high speed signals from outer layers to proper strip line layers.
  • Route all high speed Nets with proper design constraint based on design rules or simulation results.  
  • Layer Stack-up creation
    • No. of Signal Layers                                       ---   Based on total no. of Nets
    • No. of Plane Layers                                        ---   For distribution of GND and PWR Nets
    • Spacing between Plane & Signal Layers        ---   Depends on Cross-talk tolerance
    • Spacing between Plane Layers                       ---    Based on inter-plane capacitance
    • Track width in Signal Layers                          ---    Based on trace impedance
    • Gap between Signal Layers                             ---   To obtain specific PCB thickness
  • Once high speed critical nets are routed power supply routing can begin based on sample layout on data sheets.
  • Fan out GND connections for power supply nets. If required separate analog and digital ground.
  • Determine proper decoupling @ all voltage rails specially the ones driving single ended wide buses.
  • Run Power Integrity simulation for
    • dc drop
    • impedance vs frequency curve
    • simultaneous switching noise
  • Route non-critical nets and complete the first iteration of layout.
  • Post layout SI, PI and Thermal simulations.

Tuesday, 18 February 2014

Sensor Characterization Bench

Currently I am working on an interesting project that I would like to share. It is the design of complete instrumentation and electronics for a sensor characterization chamber. Let me first explain what a sensor characterization chamber is. In our Sensor hub many MEMS engineer design various types of low power low cost sensors to be implemented on the field. In order to plot the proper characteristics of these sensor one needs a characterization chamber. It can also be used to calibrate the response of a sensor to a much higher standard coming from ultra precise standardized sensor. It also helps to plot how the sensor behaves by simulating various environment like high humidity, high temperature presence of other gas which mixes with the targeted gas and contaminates the data. Let me share a block diagram of the various instruments used for the characterization chamber.
 Most of the block diagram is self explanatory. The main controller controls the environment inside the chamber. User can use per-programed settings or even can use custom settings while using the chamber with their sensors. The fan controller is used for expelling the gases once the process is finished and the pump controller is used to increase or decrease the internal chamber pressure. The gas input controller lets the user to control the flow and amount of gas into the chamber. For collecting data from the sensor a low noise proper analog interface is used. Which then converts the analog value into a high resolution 16bit digital count. There is provision for storing the data or displaying it to a computer which gives various other functionality. The biasing power requirement for MEMS sensor can be difficult different designs require different voltage some needs constant current whereas some needs both. So a software controlled voltage and current source is dedicated for this purpose. The power module provides appropriate power to different sections.
From designing point of view I have broken the system into 5 independent PCBs. 
  1. Power Module board.
  2. Main chamber controller board
  3. Sensor power, Sensor interface, DAC and PC interface all in one board.
  4. Gas input controller.
  5. Fan and vacuum pump controller.
As I go about designing each board I will post updates as necessary.
I will start with the Fan and vacuum pump controller.

Friday, 21 June 2013

DC Power adapter Noise

In my last blog we talked about how noise can creep into and destroy your seemingly clean system when you have a switching device in the vicinity. I thought as we were already discussing the topic of noise let me also give you another example of a noisy source. 

Now a days every one is familiar with dc power adapter which comes with various electronic equipment including mobile phone chargers, microcontroller development board and other stuff. Pretty handy little device light weight directly plug into wall socket and provides +12V, +5V, +9V voltage (depending on the rating) to power or charge your device.

What is inside these devices are called switching regulator circuitry rather than linear regulator. Most advantage of switching regulator is the power dissipation within its series pass transistor is minimum giving it ultra high efficiency of more than 90% some times. However the circuitry is complex and suffers from noise being injected in the output dc rail. The noise is a result of the high frequency switching which is used internally within the regulator.

In most of the case when you are designing your circuit you will have the output of the adapter to go into a linear regulator say 7805 to get a low noise regulated dc output provided you decouple the output properly. The scheme should look something like this.
 

The output in this case is properly decoupled to reduce noise content in the 5V rail, however the 12V rail remains to be decoupled. I have probed the two Rails with ac coupled channel in my scope to find out the noise content within each of them.

Noise @ +12V Rail ~ 96.8mV
Noise @ +5V Rail ~ 11.2mV
I have excluded the transient peaks since I was again using a breadboard.
Clearly from this the noise at the 12V rail is substantially more. The 5V rail being a linearly regulated one along with proper decoupling shows much lower noise it would be much more cleaner on a PCB. Now most of the times may be you wont use the +12V rail in your circuit. But sometimes say if you do want to include both the rails (for high voltage applications) you definitely want to do something about the noise.



This is the same noise with the scope speed up. The switching frequency of the switching regulator can be clearly seen.
Simple solution is just decouple the +12V rail as well.


With input decoupling capacitor. 

The Noise on the 12V rail is greatly reduced.
This is a simple and effective way of having two power rails within your circuit.

Tuesday, 18 June 2013

Noise Analysis for the 555 timer - How to not ruin your design.

Noise Analysis for the 555 timer

With modern day advancement in electronics resulting in low power and high speed designs noise becomes an ever increasing challenge for circuit designer. The concept of noise its effect and analysis is quite complex apart from noise which can come into the system from external sources via different forms of coupling via i/o ports, power rail etc certain electronic components also generate noise on their own. Every data sheet specifies those parameters. So dealing with noise is quite a challenging aspect. However in this blog I am not going to get to complex mathematical analysis of noise but show you a rather simple example of what noise can do to your circuit if proper precaution is not taken. 
Let us start with a simple circuit a 555 timer hocked in astable configuration to generate a 4% on time duty cycle. Before I go any further let me tell you if you have switching elements in your circuitry there is a high chance you have to deal with noise issue as switching elements have very high frequency components which can get coupled to other parts of the circuit. 555 timer is a switching element hence we have to deal with noise. This is the circuit we will be dealing with.
This is a simple circuit used to generate a PWM waveform to blink a LED at the output. It can also provide voltage control to other parts of the circuit. Generally the duty cycle you get from 555 timer in normal astable configuration is always greater than 50%. In order to get around this I used diode D1 which bypasses R2 hence duty cycle can go below 50% now. As usual the circuit works perfectly fine giving duty cycle of 4% @ 2.93Hz. Here is a grab from the oscilloscope.

The rise time for this square wave output is about 130nsec. This is from a cheap Chinese 555 timer IC. The CMOS version of 555 can have very low rise time. Lower the rise time steeper will be the slope and the wave form will contain more high energy stuff and likely to produce more noise. Let us look at the Rise time curve.
Notice the measurement window at bottom left the rise time is shown there. With 130nsec still this chip will inject considerable noise.
Look at the circuit diagram notice the power pin for the IC (pin 8) it lacks a decoupling capacitor. The only decoupling the +5V rail gets is from the decoupling capacitor at the voltage regulator output. As the V_reg was quite far away pin 8 requires its own decoupling cap.
Now let us look at the power rail with our channel 2. Channel 2 is ac coupled so we are only looking at the noise which sits over the +5V dc.
Ok before you panic let me tell you this that I have built the circuit on a bread board not the ideal case when you want to do noise analysis. In a printed circuit board this effect would be somewhat reduced but always be there to ruin your design unless you do something. Ok coming back to the diagram look at the delta y measurement I have done that gives the peak to peak noise its almost half a volt. That much of noise is being injected into the rail. Now if you feed your other parts of circuitry with this rail say your precision low level amplifier your design is done. Most probably if your amplifier does not have good supply rejection it will start to oscillate not a good thing for your design. Another thing I noticed when the output is high the amplitude of the noise is low compared to when the output is low. The following picture will clearly show it when I have speed up the scope.
Now just by pacing a single 1uF cap as a decoupling capacitor the noise reduced almost 1 orders of magnitude. I have tried different cap values 0.1uF, 10uF, 47uF etc 1uF works the best.



Let us look at the decoupled version of the noise.
Again look at the delta y measurement the noise now merely is 58mV peak to peak. Still 58mV is not enough for certain application but then we have to design our circuit on a pcb. However a  ferrite bead series with the power rail will prevent some of those high frequency components from going into the power rail and subsequently into other parts of the circuit. Ferrite beads being basically an inductor provides high impedance to high frequency signals thereby blocking some of them. I didn't have a ferrite bead so I use a 1mH inductor not ideal but the noise did decrease a bit.
Here is the final noise result.
Final peak to peak noise with inductor is about 44.8mV.

So here it is an apparently simple circuit can wreck havoc in your design if you don't know the effect of noise. Although I have just scratched the surface of a vast topic but I hope this will give you enough knowledge to be cautious when dealing with switching components in your circuit. Till next time... 





 

Saturday, 1 June 2013

The Twin - T Notch Filter

Before I start let me give an brief I mean really brief introduction of what electrical filters are. Simply electrical filters are filters which filters out unnecessary information i.e. signals from data so that we can get a cleaner low noise output signal. Filters can be used for various applications like selecting frequency multiplexed signals, noise reduction ac decoupling. The last one is going to be the example I discuss here.

Filters can be classified into two categories broadly Passive filters (only R,L,C components) and Active filters (R,C along with active devices like op-amps and transistors). 
For more components, a little more power consumption and a little bit extra cost Active filters yield certain advantages like 
  • Flat passband response.
  • Sharp transition from passband to stopband.
I can go on and on about filters but let me focus on the example. It is really simple and a great example of showing the power of this kind of filter. A very low amplitude signal from a bio-med sensor was to be amplified and sent to the ADC. The input to the amp was in uV range and output from the amp was 2 to 3 volts. In this kind of situation it is best to use a chopper or auto zero amplifier which has low offset voltage however offset voltage is not the problem here.
Before going further let me discuss about the power plane of this board it consist of a single 5V DC BUS which comes from a regulated power supply which is fed from half wave rectified ac signal.
 
During the first attempt I build this circuit by normal layout scheme decoupling the opamp power pins. It was working just fine the ADC readout was ok but sometimes the ADC was producing odd set of values it was completely random. This random value did not fit into the data set points and I was sure this was due to noise being injected either at the i/o pins or the power pins itself. As the noise was considerable I was sure it had to be the power pins. So I probed it and voila... It was the residual 50Hz noise from the AC supply. Although The linear regulator is supposed to produce a clean output still some noise remains and it is being magnified by the op amp output stage.
 
Therefore this is an ideal situation to use a filter at the power pin of the opamp. Now ofcource we can use active band reject filters tuned to reject the 50Hz component from the power line but as most of the power associated in this signal will be in the dc domain with a very narrow band to be rejected active filters will really be a overkill. So are we going to yes a normal passive filter network? The answer is yes and no. The filter network will be passive ok no doubt in that but it wont be your typical LPF or HPF.  Using normal LPF will work but only moderately since they have very soft cut off some of the 50Hz noise will still remain definitely will be of less amplitude but never the less will remain. So we have to use a modification of the normal passive filter. This is where we use the Twin T notch filter.
 
The Twin T notch filter has the similar soft response like other passive circuits suffers from but it has extremely almost like brick wall response at the selected tuned frequency ideal for rejecting a single frequency component like the 50Hz noise. 
How this particular filter works is simply it adds two signals which are 180degree out of phase at the tuned frequency. So the amplitude response at the tuned frequency is extremely low.

However there are certain disadvantages with this filter 
  • The component values have to be precisely matched
  • Very difficult to tune
By applying this filter everything became normal. The random jitter of the ADC readout completely went away. Later I will try to share a screen grab from the oscilloscope showing the noise free signal.

Just wanted to  share this simple yet effective piece of circuitry which you may use in your next project and get noise free result. Till next time...

Wednesday, 10 April 2013

FM transmitter unit for Gas Sensor

         I was working in designing a proper low power signal conditioning circuit for a MEMS based gas sensor for quite a while. Now as these sensors are supposed to be deployed in remote isolated areas deep within coal mines it is always advantageous to read the value of these sensors remotely or in a wireless manner. Now RF power transmission within coal mines are highly regulated and operates at strict protocols. The conditions that I was to follow was that my unit should not in no way transmit more than 5W in RF power. So I designed my power amplifier stage around 4W max. 

                Next was choosing the transmission protocol. Now as my system was more or less digital I was initially inclined to go for digital communication scheme. So I choose FSK to transmit serial binary information. Turns out there is a single IC TH72031 from Melexis Microelectronic Integrated system capable of performing the entire FSK operation directly on Digital Data. But further analyzing the scheme although it was very simple presented certain problems. The major being FSK signal with 4W power was not being picked up by the receiver at the supposed distance. Another problem was as FSK IC was generating a variable frequency square wave applying it directly to the antenna produce spurious transmission at frequency bands it is not supposed to transmit. The solution was to use a very costly RF band pass filter or change the transmission scheme. 

             I choose a good old analog transmission scheme Frequency modulation. The idea was the microcontroller reads the gas sensor value performs internal calculation and calibration and then sends the final digital value via I2C BUS to a 16bit DAC. The then received analog value is properly scaled and transmitted.

              Let me share the schematic for this.
  
  The MAX2606 is a FM generator chip. It uses only one inductor L4 to set the nominal frequency around which the modulation will be done. We apply the analog signal from the DAC with proper scaling (can be tweaked during operation) to the TUNE input.

The MAX2606 output is about 50ohm and is applied to the PA stage and subsequently to the antenna. However the antenna choice and design is not yet complete.

I will be updating as the circuit development goes on...  
 

Saturday, 15 December 2012

Smart Digital Thermometer REV A Schematic

Here is the link for the REV A schematic. You will notice that some component values are missing this is because I haven't tuned those values yet soon will be doing so.

How ever for now...

http://www.ziddu.com/download/21121547/page1.pdf.html

Friday, 9 November 2012

Power Supply design for the thermometer

OK for the power supply design I will be using a dc dc boost converter to crank up 3 volts from  two AA batteries to 5 Volt which will be the system VCC.

We also need a -5 volt negative supply and for that we will be using another dc dc converter using the flying capacitor configuration. Luckily the IC we will be using MCP34063  is a multi purpose converter chip capable of step up, step down, and inversion.

So using the fist converter we convert 3 volts to 5 volt system VCC. Then +5 volts from system VCC to -5 volts for the negative supply. Although as the negative supply will be used only for biasing the opamp its current requirement will be much lower.

Let us discuss some feature for the MCP34063 converter:
For calculating the values of the other passive elements we follow the tabular approach.

Just filling in the equations we can calculate the values of the various other passive components components.

For our requirement we need 3 to 5 volt boost.
Turns out I had already designed a power supply which uses this kind of approach i.e. using two AA batteries to generate 5 volt supply. I actually designed a board with it as well which I will share here.

First the circuit diagram
The final value of the output voltage is set by the ratio of two resistor   R4 and R5 here so I have chosen accurate 1% tolerance E96 values. Yes these resistors are costly but to maintain the accuracy of the output voltage it is necessary.

Actually this project I did for the open source hardware community. One of the forums I saw some students wondering how to power the common rail of their breadboard from battery they were using an entire 12 volts 8*AA batteries and then converting then using a linear regulator 7085 to 5 volts. This was cumbersome 8 battery pack plus wastage of power due to linear regulator. So I decide to use this scheme to design a board which has output pins which directly clamp on the breadboard powering the VCC and the ground rails respectively and just using 2*AA rather than 8.

PCB design
The above circuit on a double layer board. XCON1 and XCO2 are the power and Ground pins which directly clamp on with the bread board.

Let us look at the finished PCB design

The complete populated board with onboard battery holder installed

So far for the power supply design in the future I am sure to make modifications to it but for now this will do.
In the next blog we will start working with our software.

To be continued...

Tuesday, 6 November 2012

Smart Digital Thermometer design 2 -- Temperature independent voltage reference

In the last blog we completed the offset circuit for our temperature sensor. We saw that for offsetting the voltage we need a precise temperature reference. This temperature reference should have fairly low temperature co-efficient (dV/dT) thus should not change its reference voltage output considerably as the thermometer is subjected to varying temperature.

Now as we are using a intelligent controller the ATMEGAGA168 it is capable of outputting an temp independent analog voltage as a PWM output. But in order to use that we need to use the PWM output pin and further filter it to eliminated ripples. At least we need a second order filter for smoothing out the voltage considerably. However the main disadvantage of using this scheme is the fixed quantization level for the PWM output. For the ATMEGA 168 controller it has 256 levels i.e. the duty cycle for the PWM output can have only certain fixed value. This may be sufficient but for this case we are opting for ultra precise accuracy so we will use a separate voltage reference IC.

When it comes to voltage reference the most common is a zener diodes. Zener diodes work in reverse bias condition and the reverse breakdown voltage is actually its voltage reference. We are going to use the LM336 band gap reference zener.

Before we continue let us characterize the features for an ideal voltage reference :
  • It should be accurate in its voltage output.
  • NOT temperature dependent. Voltage should not change with temperature.
  • Cannot deliver high current.
  • Need not have low output impedance.  
This is a simple scheme for biasing a zener reference. R1 is the biasing resistor.
For a generic zener dV/dT = 2.2mV/deg C
For a generic diode dV/dT = -2.2mV/deg C
So using them in combination will eliminate the temperature dependence.
Let us implement such a scheme
The base emitter junction of the transistor Q4 acts as a diode drop which has negative temperature coefficient so this scheme incorporates both positive and negative temperature coefficient thereby greatly reducing temperature dependence of the circuit. R2 should be sufficiently large to prevent high current drain from the circuit which would change the biasing voltage V2.
This type of scenario is highly unlikely but if it does happens current through R1 will change thus reference voltage of D1 will deviate.

Solution

Here we are using the Wilson's Current mirror concept any change in the load current will get reflected in the biasing current keeping the reference voltage more or less constant. With this current configuration we get a value of 3.1788V across the 1 MEG resistor. By using a proper voltage divider circuit we can then convert this voltage into 2.73 reference. So let us add this circuit in our design.

Sunday, 4 November 2012

Smart Digital Thermometer - design1

In the previous blog we discussed the requirement of offsetting the voltage we get as output from LM335 temperature sensor.
Now let us design the subtractor ckt we talked earlier.

Here is the circuit diagram (EAGLE CAD)
OK so this is a basic op amp based subtractor ckt. We are using a 2.73V reference (a whole new blog on how to generate temperature independent precise voltage reference) which will get subtracted from the voltage coming from the sensor in the resistor R6.
You may notice that I have left one terminal of the sensor open that is the adjustment terminal which we will use for the calibration purpose again another new blog.
Anyways with this arrangement what we get is 0volt when the temperature of the sensor is more or less 0 deg C.
For the op amp I have used a generic LM358 op amp which has a modest offset voltage. Right now I will use this later if required will upgrade to ultra low offset voltage chopper amplifier.

Now for some simulation
However before we do so let me tell you the above ckt wont work. Reason for a subtractor circuit to work the opamp must be powered from a dual supply how ever above we are using single so output just wont swing. 
Now for simulation let us apply 3.73 volt at the input stage of the amplifier (simulating 100 deg C) we should get 1 volt output right but the opamp just cant deliver this. Let us plot the graph for the above arrangement.

The blue curve represent the input 3.73 volt. The green curve the output which should be 1 volt but here it is merely 100mV.
So we need a dual power supply (talk more during the power supply design stage)
Let us modify the ckt for dual supply +5V and -5V
Now let us simulate again for 100 deg C we should get 1 volt
The green plot the input is at 3.73 volt now the output does swing to 1 volt. 
So the solution is to use dual power supply for our opamp.

Implementing in strip board

Although here I am using two 9volt batteries with a common centre tap to generate positive and negative supply in the actual design we will be using switched mode supplies which will use flying capacitor voltage inverter.

In the next design phase we will be concentrating on the implementation of a temperature independent 2.73 volt precision voltage reference.

to be continued...

Smart digital thermometer - from conception to design

Smart Digital Thermometer

Ok before we start let me say this - this is going to be a multiple blog entry and it will be an ongoing project as I develop and modify the design criteria of the Smart Digital Thermometer.

So with that let us begin. Let me give a brief introduction to the project. The idea is to create smart thermometer for logging temperature in digital format. Sounds simple enough but I am going to pack the device with tons of features like a clinical mode with high precision operating between 36 deg C and 45 deg C as well as a normal 0 to 100 deg C. Device will have an internal memory users can create patient profile where the temperature will be logged automatically w.r.t. time. Device will have a real time clock There are also other feature which I will discuss as we go along.

Now one may ask there are tons of digital thermometers like this in the market why is this project special. That is because my soul idea behind this project is to design a high precision sensor with as low cost as possible. I will rarely be using high priced all in one package IC. For all the controlling, detecting and logging stuff  I will be using  of the shelf "jelly bean" stuff but ensuring the high precision is always maintained no compromise there.

The basic temperature sensor is going to be a LM335 IC from Texas Instruments. Initially I will be using a single IC but later upto 4 for averaging the temperature for increased accuracy. For more info please check the data sheet.









Basically it is a Zener diode with breakdown voltage function of temperature as 10mV/deg K. However current flowing through this device should be sufficient enough to cause breakdown but not too much to cause self heating which would interfere with the actual temperature.





















However we can see a problem here we do not work with Kelvin scale generally. So for 0 deg C we will get 2.73V as the output i.e. when we say we are getting 2.73V at the output of the sensor we know the temperature is 0 deg C. Similarly 3.73V at 100 deg C. But we want 0V at 0 deg C and 1V at 100 deg C.

Now we can easily offset this in our software but again although we will be using a 10bit ADC which is more than enough but still we will loose some precision in this conversion so we will offset this in the analog domain and then sense the offset value via the 10bit ADC. So our first problem lies in designing the offset analog circuit. Solution very simple we will be using an op amp based subtractor ckt.

In the next post we will design and simulate this ckt and then implement it on a strip board.

to be continued...

Tuesday, 16 October 2012

Test Equipment --- Electronic Dummy Load


The most common thing or rather the most frequent thing we circuit designer generally do is design Power Supply to power our circuits. In recent times where there is a buck load of battery driven devices power consumption becomes more important. Gone are those days where using a simple circuit to implement a linear regulator like 7805 which wastes about 5W of power to deliver 1W a rough approximation which can go worse depending on application. The increased power dissipation not only drains more and more battery life but also the heat sink size increases immensely. Here comes the application of rather complex switched mode power supplies.
    However designing either kind the power supply unit must be tested through out its entire range. This piece of test kit exactly does that. Thanks to Dave from EEVblog for this design. If you haven't checked EEVBlog do check it.

Variable electronic dummy load 
What is it?                               :                    A variable electronic dummy load is basically a constant current sink where the value of the sinking current can be set by the user. Once the sinking current is set the device will continue to draw the same current from the test device.
Where it is used?                    :                    It is used to test various power supplies, linear as well as switched mode to check whether the designed power supply really does cater for the whole load range.
Why use it?                             :                    Power supplies can also be tested by connecting a power resistor in series with its output terminal and noting the current through and voltage across it. Now to test the power supply for the entire load range one must have an inventory of numerous values of power resistors and test them individually. This is cumbersome. Here the electronic load comes into play. With just a turn of a potentiometer the user can emulate various power resistor values with ease.